1. Field of the Invention
The present invention relates to the field of photolithography to form integrated circuits and more particularly to the field of anti-reflective coatings used in photolithography.
2. Discussion of Related Art
Photolithography is used in the field of integrated circuit processing to form the patterns that will make up the features of an integrated circuit. A photoresist is employed as a sacrificial layer to transfer a pattern to the underlying substrate. This pattern may be used as a template for etching or implanting the substrate. Patterns are typically created in the photoresist by exposing the photoresist to radiation through a mask. The radiation may be visible light, extreme ultraviolet (EUV) light, or an electron beam (either projection or direct write). In the case of a “direct write” electron beam, a mask is not necessary because the features may be drawn directly into the photoresist. The substrate underlying the photoresist may be reflective, thereby causing light or electrons to reflect back into the photoresist and distort the pattern.
Anti-reflective coatings (ARC) are typically employed to reduce the amount of light reflected from reflective surfaces back into the photoresist. These anti-reflective coatings may be a top ARC formed over the photoresist, a bottom ARC (BARC) formed under the photoresist and above the reflective substrate, or a specialty multipurpose ARC such as a sacrificial light absorbing material (SLAM). There are different ways by which an ARC may prevent reflection of the radiation from the silicon wafer back into the photoresist. One way that an ARC may work is by causing destructive interference with the light reflected from the silicon wafer. This may be done by tuning the thickness of the ARC such that destructive interference will occur within the ARC, for example by making the thickness of the ARC equal to half of the wavelength of the light. Destructive interference in the ARC may also be accomplished by tuning the refractive index of the ARC. An ARC may alternatively be a purely absorbing ARC that has been formulated to include light absorbing pigments. These types of ARC materials do not absorb or interfere with all of the light that is reflected from the silicon wafer. As a result, standing waves may be formed within the ARC due to the sum of light reflections from the top and bottom ARC interfaces. Standing waves cause problems such as line narrowing and line roughness in a photoresist as illustrated in FIGS. 1a and 1b. FIG. 1a illustrates a top view of photoresist lines 100 over a BARC 110. The dotted lines represent the portions of the photoresist 100 that has been affected by standing waves. Standing waves may cause line narrowing 120 and line roughness 130. FIG. 1b is a side view of the same photoresist lines 100. Line narrowing and line roughness of the photoresist will later translate to the resist and ultimately to the material being etched. Of particular concern is the formation of narrow lines and rough lines in dielectric materials that are etched to form interconnects and vias. The line roughness may be significant enough to degrade critical dimension control of the interconnect lines and vias or other structures formed by photoresist processes. To address the loss of CD control, thicker ARC materials have been used. But as the dimensions of integrated circuits are scaled down the thicker ARC materials are not integrateable.
The ARC may also be in the form of a sacrificial light absorbing material (SLAM). SLAM is used in dual damascene and it has light absorbing properties like an ARC and has etching properties similar to those of the dielectric layer used in the particular dual damascene structure. In dual damascene, a first etched region (e.g. a via or a trench) within a dielectric material may be filled with SLAM. After the first etched region is filled with the SLAM, a second region is photopatterned and etched (e.g., a trench if the via is already formed or a via if the trench is already formed). The dielectric layers into which the dual damascene via and trench combinations are etched lie on top of various other layers that may be made of metal or other materials. Those layers have different optical properties. As a result, when light strikes the surface of such a substrate, it may be reflected back up into the SLAM. Most of the light is absorbed by the light absorbing dyes within the SLAM but some of it that is not absorbed may cause undercutting of the resist material and ultimately loss of critical dimension (CD) control of the interconnect lines and vias formed by dual damascene processes incorporating SLAM. The loss of CD control may have a significant effect on structures formed by these methods as integrated circuit technology is scaled down to the 45 nm node where line width roughness may be approximately 2-3 nm, or scaled down to even smaller dimensions.